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AI Interconnect Demand Tightens Copper-Optical Line as Astera Labs Targets Scale-Up

At the 2026 CIOE China Optical Expo, AI demand pushed interconnect design to the center of data center infrastructure. Astera Labs said rising GPU scale, speed and power constraints are shifting the copper-optical boundary and lifting value per accelerator.

"The higher the compute demand, the more processors need to exchange data quickly, and the interconnect 'nervous system' must keep up," said Sanjay Gajendra, president and COO of Astera Labs, according to Leiphone. The pressure comes from AI infrastructure growth: as GPU counts rise from a few to dozens, hundreds or thousands, data transmission efficiency between processors directly affects system performance.

Astera began betting on interconnect in 2017, before large language models were widely used. Gajendra said the company judged that connection architectures designed for previous generations of processors would not support systems with 10 or more processing units per server, let alone dozens. Conventional servers were designed around one to two CPUs, with storage and networking largely as peripheral I/O. As CPUs, GPUs and SmartNICs entered servers together, the volume of data that needed to be exchanged inside the system rose rapidly.

Gajendra summarized current interconnect challenges as three variables: speed, scale and power. Around Astera's founding, PCIe per-lane speed was 8 GT/s; it has since risen to 64 GT/s. AI systems have expanded from four to eight GPUs toward dozens, hundreds and larger deployments. "To keep up with current AI deployments, data transmission speeds are doubling every year," Gajendra said. At larger scale, latency must remain low while maintaining memory consistency and processor synchronization, and interconnect power consumption becomes a constraint.

These pressures are changing the copper-optical boundary. The traditional rule that short distances use copper and long distances use optical is no longer sufficient; distance is no longer the main variable. Gajendra said the core variables for deciding when to move from copper to optical inside a rack are transmission speed and GPU scale. At 200G per lane, copper can still work. As connections move toward 400G per lane, optics will enter racks more often, and the connection density and thermal pressure from more GPUs will further influence whether customers choose copper or optical.

Cost also complicates the choice. Vendors ultimately calculate the token cost of the entire system for each connection method. Engineers at Astera Labs told Leiphone that copper and optical will not simply replace each other in next-generation AI systems. Many short-distance connections will still use lower-cost, more mature copper. When systems expand to thousands of GPUs across multiple racks, the metric becomes the unit token cost of the whole system.

Using Nvidia's NVL72 72-GPU scale-up domain as a reference, Astera engineers said that as computing demand grows, larger scale-up domains may reduce how often data must pass through scale-out networks. Those networks typically involve NICs, Ethernet or InfiniBand switches and other subsystems, adding latency and complexity. Expanding scale-up through optical interconnect could therefore lower unit token cost. On technology paths, Gajendra said NPO, or near-package optics, will begin entering scale-up deployments around 2027. CPO, or co-packaged optics, already has small-scale applications, but larger scale-up deployment may not come until 2029 to 2030.

Capital spending by cloud providers has driven AI infrastructure growth, but that pace cannot continue rising indefinitely. Asked whether slower AI data center construction by leading cloud providers in the next one to two years could affect connectors like Astera Labs, Gajendra did not deny the possibility. He said AI is still in a concentrated infrastructure-building phase, and U.S. hyperscalers have publicly committed more than $1 trillion in data center investment. As large-scale construction is completed, capital expenditure will eventually stabilize. According to public information, Microsoft, Alphabet, Amazon, Meta and Oracle are expected to spend about $795 billion combined in 2026, rising to nearly $1.08 trillion in 2027, and the market is watching for signs of a slowdown.

Astera's answer is not only to wait for more data centers. It aims to increase the value it captures around each accelerator. Gajendra gave a sequence: with only Aries PCIe Retimers, Astera's product value per accelerator was less than $100. After adding switching chips and memory products, it rose to several hundred dollars. At the scale-up switching stage, value per accelerator reached several thousand dollars. Scale-up is therefore a key focus. Gajendra said the company originally expected its Scorpio series to become its largest revenue product line in the fourth quarter, but that milestone has moved forward to the third quarter.

Gajendra also identified inference as another growth source. Training and inference share requirements for high bandwidth, low latency and low power, but their priorities differ. Training relies more on compute, while inference puts more emphasis on memory and low latency. Unlike training, which is concentrated in large data centers, the inference market will have more participants and more dispersed system forms. "Especially in the inference market, more customers will enter. This is a very fragmented market, with many participants and many systems," Gajendra said.

As inference spreads, connector vendors face more diverse customers. Gajendra said North America is mainly led by four hyperscalers—Amazon, Microsoft, Google and Meta—plus AI labs such as OpenAI and Anthropic. In China, besides large internet companies such as ByteDance and Alibaba, many startups of different sizes are participating in AI infrastructure. "If I have to summarize one difference, opportunities in the Chinese market advance very quickly," he said. Astera engineers told Leiphone that large U.S. customers emphasize standardization, supply chain reuse and compatibility across product generations, while Chinese customers are more willing to try different technical approaches and value rapid deployment.

Even as internal systems become more customized, external connection interfaces are likely to remain standardized. "There will be more customization, and this trend will continue, but everyone will still try to adopt open standards. External connections and interfaces will remain standardized, while processor internal architectures will be customized for different workloads and performance metrics," Gajendra said. He cited ByteDance and Alibaba as examples: ByteDance's infrastructure mainly serves its own business, while Alibaba supports internal applications and provides cloud services to external customers, so their processor and server designs will not be identical. For connector vendors, the challenge is no longer adapting to one unified server architecture but to increasingly varied processors, workloads and deployment forms.

From copper-optical choices to scale-up expansion and different customer demands for customization and standardization, interconnect is moving from a relatively independent supporting role to part of AI infrastructure design. When connection methods affect GPU scale, system latency and token cost, their value is no longer just moving data but determining how much compute can be converted into usable system performance.

Editor's Summary

At the 2026 CIOE China Optical Expo, Astera Labs and other vendors highlighted how AI compute expansion is pushing interconnect design beyond traditional copper-optical boundaries. Astera says speed, GPU scale and power constraints are raising the value of scale-up connectivity, even as hyperscaler capital spending is expected to eventually stabilize. The company is targeting inference and regional differences in customization, with NPO and CPO deployments seen later this decade.