Former Graphcore President Lu Tao Joins MemSilicon as CEO After RMB400 Million Series A

The round also drew participation from Bosch Ventures, Chuangling Capital, miHoYo, Zhongguancun Science City and GigaDevice, according to the report. Existing investors Furong Investment, Guokai Sci-Tech Innovation, Hengyu Capital, Jinqiu Fund, Shunxi Fund, Xiaomi Strategic Investment and CAS Star continued to invest.

Lu has spent more than two decades in the semiconductor industry. He was previously China general manager at Cavium and a vice president at Lightelligence, with experience spanning Arm server CPUs, AI processor IPUs built on large SRAM architectures and silicon photonics, according to the report.

His ties to MemSilicon date to 2024, when the company was founded and invited him to become CEO; he declined at the time. Lu told Leiphone that MemSilicon was then focused on moving its storage technology from the lab into products, and he felt he could contribute limited value. Before his latest decision, MemSilicon had decided to enter computing, giving him room to pursue the product he wanted.

The GTC event in March was a trigger, the report said. Watching Nvidia chief executive Jensen Huang launch products, Lu recalled competing with chip giants at Graphcore, Cavium and in switch chips. Building a company from scratch was an option, but he estimated that assembling a team, settling on an architecture and closing financing would take six to nine months even in a hot market, and he was not sure how long the enthusiasm would last. Speed was very important, he said, and joining MemSilicon allowed him to start faster.

MemSilicon's team originates from the group of Liu Ming, an academician at the Chinese Academy of Sciences, and has more than 20 years of memory technology work, the report said. Besides RRAM, it has research foundations in SRAM, MRAM and DRAM, which the company aims to combine with Lu's computing architecture and industrialization experience. After joining, Lu quickly formed a core LPU team of more than 10 people covering hardware, compilers and system software. He emphasized lessons from Graphcore's work with leading customers, including why new architectures succeeded or failed in practice. Lu summed up the team's capability as know-how and know-why: knowing how to build a chip and why to build it, and what value it should deliver to users.

The first LPU is aimed at full models with trillions of parameters, without relying on quantization or speculative decoding, and targets 1,000 tokens per second for each user, according to the report. Lu used high-speed rail as an analogy for pricing: customers will pay for better speed and experience, but if an ordinary ticket costs 200 yuan and a high-speed rail ticket costs 2,000 yuan, adoption will be difficult. High-speed inference can carry a premium over ordinary service, but the premium must be limited. He said the product should not be a niche but a mainstream service.

The design depends on joint innovation in storage, computing and interconnect, the report said. Graphcore's IPU, which Lu helped commercialize, used a large-SRAM architecture that provides high bandwidth and low latency but faces capacity constraints with trillion-parameter models. Adding chips to hold such models brings cost, power and time overheads in cross-chip interconnect. MemSilicon's LPU aims to keep SRAM's speed advantages while adding capacity from other media, using fewer chips to carry large models and controlling interconnect costs. Lu said the first-generation LPU will not use RRAM and will rely on a more mature storage medium; RRAM still needs work on capacity before it can be combined with computing products.

MemSilicon is currently in discussions with leading cloud service providers and large-model companies, according to the report. Over the next two to three years, Lu aims to deliver computing products to customers while advancing high-capacity RRAM development. The company's differentiation, as described in the report, lies in combining memory devices, process accumulation, computing architecture, software and industrialization experience in one team.