Apple and Xiaomi Race to Break 'Memory Wall' in AI Chips

According to a report by Chinese tech outlet ifanr, Apple's new Mac mini and Mac Studio are positioned as always-on AI agent machines and professional workstations, with the Mac Studio offering up to 512GB of unified memory. The report cites memory bandwidth figures from 170GB/s on the base M6 chip to 307GB/s on the M5 Pro and 1.2TB/s on the flagship M5 Ultra. One day before Apple's launch, Xiaomi unveiled its on-device AI accelerator chip Xuanjie O100 with a memory bandwidth of 1.22TB/s, while Nvidia's RTX 5090, with 32GB of GDDR7 memory and a 512-bit interface, reaches nearly 1.8TB/s.

The report explains that memory bandwidth, not just capacity, determines how fast a model can run. Capacity decides how large a model can fit; bandwidth decides how quickly data can be fed to compute cores. During autoregressive decoding, every newly generated token requires the compute unit to read billions of parameters from memory. When bandwidth lags behind compute speed, systems become memory-bound, spending most of their time waiting for data.

This problem was identified long before the current AI boom. In a 1995 paper, computer scientists William A. Wulf and Sally A. McKee coined the term "memory wall," noting that processor speed was growing faster than memory bandwidth, creating a widening gap. The large-model era has now driven the entire industry directly into that wall, according to ifanr.

The pressure is reshaping the memory supply chain. Citing data from TrendForce, the report says Samsung, SK Hynix and Micron are shifting limited advanced wafer capacity to high-bandwidth memory and high-end server DDR5 for AI data centers, squeezing the supply of consumer PC DRAM. Even in off-peak seasons, contract prices have kept climbing. Micron announced last year it would phase out its Crucial consumer memory business, and a third-party SK Hynix brand store in China recently closed, reflecting the vendors' retreat from consumer channels.

Chipmakers are attacking the bottleneck from different architectural directions. Nvidia uses ultra-wide bit interfaces with GDDR7 and HBM stacks. Xiaomi's Xuanjie O100 employs wafer-on-wafer vertical stacking, placing DRAM wafers directly above the NPU to shorten the distance data travels. Apple's unified memory architecture lets all compute cores share a single memory pool, avoiding redundant copying between CPU and GPU memory. On the Mac Studio, Thunderbolt 5 and RDMA allow four machines to run as a distributed inference cluster with nearly three times the per-token throughput of a single unit. Further out, processing-in-memory and compute-in-memory aim to move computation next to storage, though their generality and compiler ecosystems are still maturing.

In a separate detail, ifanr notes that Apple made its Mac mini promotional film using handcrafted physical models rather than AI-generated visuals. The film shows the small computer growing muscular arms, a metaphor for raw power. But the report argues that no matter how sophisticated AI models become, hardware cannot escape the physical laws of data movement: the channels, wiring and wafer processes that carry data remain indispensable.