Chengheng Micro Debuts Edge AI SoC CH3715 with NPU and GPGPU in Wuxi

The company’s CEO, Chu Libin, said the product definition for the CH3715 began in 2022, before ChatGPT was released and embodied intelligence had not yet become a hot topic in the chip industry. He said the company initially identified needs in machine vision, radar and industrial equipment that were not well satisfied by a single chip: these scenarios required AI computing power, high-precision computation, image processing and low latency, and customers often had to build systems with multiple chips. The goal of Chengheng Micro’s first flagship AI SoC was to integrate these dispersed computing capabilities into one chip.

The decision to include both an NPU and a GPGPU stems from the nature of real-world workloads. The NPU is responsible for neural network inference, but devices also handle traditional computing such as high-precision floating-point algorithms in complex visual environments, FFT and signal processing for radar, and geometric computing and real-time control for robots. In some complex scenarios, INT8 precision alone cannot cover all algorithms, and the GPGPU provides higher-precision floating-point computing as well as flexibility and a lower migration cost. The chip also includes DSPs for signal processing, an ISP for image input, and CPUs for task scheduling and system control, which Chengheng Micro describes as a “heterogeneous computing, integrated architecture” approach.

According to CTO Lin Cangsong, integrating multiple vision processing modules on a single chip can improve system data throughput efficiency by more than 50%, reduce power consumption by 30%, and shrink overall device volume by 40%. These figures still need to be validated in more real-world applications, but they explain the company’s rationale for high integration. Instead of simply adding computing units, the CH3715 aims to replace a multi-chip combination on a motherboard with a single SoC, reducing power consumption, PCB area, peripheral complexity and cross-chip data transfer latency.

The company’s market strategy is to enter vertical industries such as power inspection, rail transit and industrial quality inspection. To lower the barrier for customers switching from other platforms, Chengheng Micro says it makes its SDK API-compatible with mainstream edge SoC platforms, reducing the cost of migrating existing code and algorithms. In some projects, the company has helped customers migrate algorithms accumulated over years to its platform within one to two months. For its first-generation product, Chengheng Micro is also producing mainboards and edge computing boxes so customers can see a complete solution running sooner, while it plans to gradually hand over those businesses to downstream partners and rely mainly on chip sales in the long run.

Looking ahead, Chu Libin revealed that the next-generation product will “do subtraction,” focusing on reducing chip area and improving memory bandwidth while not lowering AI computing power. The target cost is about half that of the first generation. The next product will pay more attention to embodied intelligence, but machine vision will remain the main line. Chu noted that the market for 10-20 TOPS edge chips is already crowded, and as end-side models become more complex and process technology improves, more edge devices will need chips with greater computing power.

Chengheng Micro was founded in 2023, and the CH3715 took about a year and a half of actual design time. The first product is also a verification of the team’s engineering capabilities. The company’s product route extends from industrial inspection and intelligent vision to embodied intelligence, with the first generation answering which capabilities need to be integrated into one chip, and the next generation determining which capabilities should receive priority in limited chip area.